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Binary-decision-diagram (BDD)approach for digital logic circuits reduction / (Zebari, Dilovan Asaad Majeed.)
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 naa   a22   7ar4500 

040 -CATALOGING SOURCE

a Original cataloging agency NEU GrandLibrary

041 -LANGUAGE CODE

a Language code of text/sound track or separate title eng

050 -LIBRARY OF CONGRESS CALL NUMBER

a Classification number TK7868.L6

b Item number Z43 2013

100 -MAIN ENTRY--PERSONAL NAME

a Personal name Zebari, Dilovan Asaad Majeed.

245 -TITLE STATEMENT

a Title Binary-decision-diagram (BDD)approach for digital logic circuits reduction /

c Statement of responsibility, etc Dilovan Asad Majeed Zebari; thesis supervisor Nadire Çavuş

h Medium Thesis/Report

260 -PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)

a Place of publication, distribution, etc Lefkoşa :

b Name of publisher, distributor, etc Near East University,

c Date of publication, distribution, etc 2013

300 -PHYSICAL DESCRIPTION

a Extent xiii, 103 p.;

c Dimensions 30 cm.

500 -GENERAL NOTE

a General note CD

502 -DISSERTATION NOTE

a Dissertation note Thesis (Master)

504 -BIBLIOGRAPHY, ETC. NOTE

a Bibliography, etc Includes bibliographical references

546 -LANGUAGE NOTE

a Language note Text in English; abstract in English and Turkish

650 -SUBJECT ADDED ENTRY--TOPICAL TERM

a Topical term or geographic name as entry element Logic design

650 -SUBJECT ADDED ENTRY--TOPICAL TERM

a Topical term or geographic name as entry element Graduate School of Applied Sciences

650 -SUBJECT ADDED ENTRY--TOPICAL TERM

a Topical term or geographic name as entry element Fen Bilimleri Enstitüsü

700 -ADDED ENTRY--PERSONAL NAME

a Personal name Nadire, Çavuş,

856 -ELECTRONIC LOCATION AND ACCESS

u Uniform Resource Identifier http://library.neu.edu.tr/Neutez/6311296907.pdf


Items
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Location
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Res1st FloorTK7868.L6 Z43 20136315068868
Res1st FloorTK7868.L6 Z43 20136311296907

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